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Load Operations (Integer SSE2 Intrinsics)

The load operation intrinsics and their respective instructions are functional on Intel processors supporting Streaming SIMD Extensions 2 (SSE2) instructions.

For an explanation of the syntax used in code samples in this topic, see Floating-Point Intrinsics Using Streaming SIMD Extensions.

SSE2 intrinsics use the __m128, __m128i, and __m128d data types, which are not supported on Itanium Processor Family (IPF) processors. Any SSE2 intrinsics that use the __m64 data type are not supported on x64 processors.

The emmintrin.h header file contains the declarations for the SSE2 instructions intrinsics.

__m128i _mm_load_si128 (__m128i *p);

MOVDQA

Loads 128-bit value. Address p must be 16-byte aligned.

r := *p

__m128i _mm_loadu_si128 (__m128i *p);

MOVDQU

Loads 128-bit value. Address p does not need be 16-byte aligned.

r := *p

__m128i _mm_loadl_epi64(__m128i const*p);

MOVQ

Load the lower 64 bits of the value pointed to by p into the lower 64 bits of the result, zeroing the upper 64 bits of the result.

r0:= *p[63:0]
r1:=0x0
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