Intel Itanium Processor Machine Check

Machine checks, including Machine Check Aborts, cause Itanium processor execution to vector to the Processor Abstraction Layer (PAL) PALE_CHECK code in the Itanium ISA. When PALE_CHECK has finished processing, it passes control to the System Abstraction Layer (SAL) SAL_ENTRY code in the Itanium ISA, which in turn branches to the SAL MCA handler: SAL_CHECK.

Uncorrected machine checks refer to errors that cannot be corrected at PAL or SAL layers. These may still be fully or partially recoverable at the operating system layer. At that time, the control flow differs between corrected and uncorrected machine checks.

For corrected machine checks, the operating system corrected error interrupt handlers will be invoked some time after returning to the interrupted process.

For uncorrected machine checks, SAL exposes an interface to register an OS_MCA callback. After validating this entry point, SAL_CHECK branches to it and provides an error record that will allow the operating system to recover whenever possible. The error record passed by SAL must comply, at a minimum, with the V3.0 SAL specification, Error Record Structures, Appendix B, January 2001. The HAL exposes interfaces for the OEMs to register a driver, and provides the error record to the driver. This enables the OEMs to assist the generic HAL MCA handler by attempting recovery of platform-specific errors and maintaining the integrity of the platform.

For Itanium PAL, SAL, and operating system MCA handler's details, please refer to the Intel Itanium Process Firmware Specifications.

The Itanium reference HAL provides an MCA-specific interface that can be used by drivers to:

  • Register for delivery of an ExceptionCallback function during uncorrected error processing. This callback returns an error severity value to the standard HAL OS_MCA, allowing OEM error recovery. The driver also registers a DpcCallback, which will be performed should the driver recover during ExceptionCallback processing.

  • Register for delivery of two additional DpcCallbacks. These are delivered during corrected error processing for CPU corrected errors and/or platform corrected errors.

  • Read the error records during DpcCallback processing.

For more information about MCE for this processor, see Machine Check Exception Handling for an Itanium Processor.

Note   Windows Vista and later versions of Windows do not support the type of Machine Check Architecture (MCA) and Machine Check Exception (MCE) reporting that is described in this topic. MCA and MCE reporting are supported through Windows Hardware Error Architecture (WHEA) instead.

 

 

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