A programmable pixel shader is made up of a set of instructions that operate on pixel data. Registers transfer data in and out of the ALU. Additional control can be applied to modify the instruction, the results, or what data gets written out.
- ps_2_x Instructions contains a list of the available instructions.
- ps_2_x Registers lists the different types of registers used by the vertex shader ALU.
- Modifiers Are used to modify the way an instruction works.
- Destination Register Write Mask determines what components of the destination register get written.
- Pixel Shader Source Register Modifiers alter the source register data before the instruction runs.
- Source Register Swizzling gives additional control over which register components are read, copied, or written.
DynamicFlowControlDepth represents the nesting depth of dynamic flow control instructions: if, if_comp, if_pred, break - ps, and break_comp - ps. The value is equal to the nesting depth of the if_comp block. If this cap is zero, the device does not support dynamic flow control instructions.
The number of temporary registers supported by the device. The range is from 12 to 32.
StaticFlowControlDepth represents the nesting depth of two types of static flow control instructions: loop /rep And call /callnz. loop /rep instructions can be nested up to StaticFlowControlDepth deep. Independently, call /callnz instructions can be nested up to StaticFlowControlDepth deep.
The number of instruction slots can range from 96 to a maximum of 512, and is specified by the MaxPixelShaderInstructionSlots. The total number of instructions that can run is defined by MaxPixelShaderInstructionsExecuted. This can be larger than the number of instruction slots due to looping and subroutine calls.
If D3DD3DPSHADERCAPS2_0_NODEPENDENTREADLIMIT is set, there are no dependent read limits.
If D3DD3DPSHADERCAPS2_0_NOTEXINSTRUCTIONLIMIT is set, there is no limit on texture instructions.
The number of texture samplers available is 16.