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ps_2_0 Registers

Pixel shaders depend on registers to get vertex data, to output pixel data, to hold temporary results during calculations, and to identify texture sampling stages. There are several types of registers, each with a unique functionality. This section contains reference information for the input and output registers implemented by pixel shader version 2_x.

Input Register Types

RegisterNameCountR/W# Read ports# Reads/instDimensionRelAddrDefaultsRequires DCL
v# Input Color Register 2R1Unlimited4NPartial(0001). See note 4Y
r# Temporary Register See note 1R/W3Unlimited4NNoneN
c# Constant Float Register 32R124N0000N
i# Constant Integer Register 16See note 2114N0000N
b# Constant Boolean Register 16See note 2111NFALSEN
p0 Predicate Register 1See note 2111NNoneY
s# Sampler (Direct3D 9 asm-ps) 16See note 3114NSee note 5Y
t# Texture Coordinate Register 8R114NNoneY



  1. 12 min/32 max: The number of r# registers is determined by D3DPSHADERCAPS2_0.NumTemps (which ranges from 12 to 32).
  2. Only usable by a flow control instruction.
  3. Only usable by a texture sampling instruction.
  4. partial(x, y, z, w) - If only a subset of channels are updated in the register, the remaining channels will default to specified values (x, y, z, w).
  5. Defaults for sampler lookups exist, but values depend on texture format.

The number of readports is the number of different registers (for each register type) that can be read in a single instruction.

Output Register Types

RegisterNameCountR/WDimensionRelAddrDefaults Requires DCL
oC# Output Color Register See Multiple-element Textures (Direct3D 9) W4NNoneN
oDepth Output Depth Register 1W1NNoneN


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