This instruction causes the specified coprocessor registers to transfer values to two ARM registers.
The compiler translates this instruction into the MRRC assembly instruction for ARM DSP-enhanced processors, and into the MRA assembly instruction for ARM XScale processors. MRA is disassembled as the MRCC instruction.
The XScale and the DSP-enhanced ARM microprocessors each implement this instruction in a different way:
For the ARM XScale implementation, this instruction does the following:
Moves 64 bits of data to ARM registers from Coprocessor registers
Moves the 40-bit accumulator value (acc0) into two registers
Moves bits [31:0] of the value in acc0 into the register RdLo
Sign-extends bits [39:32] of the value in acc0 to 32 bits and moves them into the register RdHi
- Moves 64 bits of data to ARM registers from Coprocessor registers
For the ARM DSP-enhanced implementation, this instruction causes the coprocessor to transfer values to the two general-purpose registers Rd and Rn.