imm_atomic_or (sm5 - asm)
Immediate atomic bitwise OR to memory. Returns the value in memory before the OR.
|imm_atomic_or dst0[.single_component_mask], dst1, dstAddress[.swizzle], src0[.select_component]|
[in] Contains the value from dst1 before the OR.
[in] An unordered access view (UAV) (u#). In the compute shader this can also be thread group shared memory (g#).
[in] The memory address.
The value to OR with dst1.
This instruction performs a single component 32-bit bitwise OR of operand src0 with dst1 at 32-bit per component address dstAddress.
If dst1 is a u#, it may have been declared as raw, typed or structured. If typed, it must be declared as UINT/SINT with the bound resource format being R32_UINT/_SINT.
If dst1 is g#, it must be declared as raw or structured.
The value in dst1 memory before the OR is returned to dst0.
The entire operation is performed atomically.
The number of components taken from the address is determined by the dimensionality of the resource declared at dst1.
If the shader invocation is inactive, for example if the pixel has been discarded earlier in its execution, or a pixel/sample invocation only exists to serve as a helper to a real pixel/sample for derivatives, this instruction does not alter the dst1 memory at all, and the returned value is undefined.
Out of bounds addressing on u# causes nothing to be written to memory, except if the u# is structured, and byte offset into the struct (second component of the address) is causing the out of bounds access, then the entire contents of the UAV become undefined.
Out of bounds addressing on u# or g# causes an undefined result to be returned to the shader in dst0.
This instruction applies to the following shader stages:
Because UAVs are available at all shader stages for Direct3D 11.1, this instruction applies to all shader stages for the Direct3D 11.1 runtime, which is available starting with Windows 8.
This instruction is supported in the following shader models:
|Shader Model 5||yes|
|Shader Model 4.1||no|
|Shader Model 4||no|
|Shader Model 3 (DirectX HLSL)||no|
|Shader Model 2 (DirectX HLSL)||no|
|Shader Model 1 (DirectX HLSL)||no|