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_mm256_permute2_pd

Visual Studio 2010

Visual Studio 2010 SP1 is required.

Microsoft Specific

Generates the XOP YMM instruction vpermil2pd to select floating-point values from its first two sources, with optional zeroing.

__m256 _mm_permute2_pd (
   __m256d src1,
   __m256d src2,
   __m256i selector,
   int control
); 

[in] src1

A 256-bit parameter that contains four 64-bit floating-point values.

[in] src2

A 256-bit parameter that contains four 64-bit floating-point values.

[in] selector

A 256-bit parameter that contains four 64-bit floating-point values.

[in] control

A 32-bit integer parameter that controls the method of deciding whether to zero values in the result.

A 256-bit result r that contains four 64-bit floating-point values.

Each value in the high 128 bits of the result is either zero or a value chosen from the two 64-bit floating-point values in the high 128 bits of src1 and src2. Each value in the low 128 bits of the result is either zero or a value chosen from the two 64-bit floating-point values in the low 128 bits of src1 and src2.

Intrinsic

Architecture

_mm256_permute2_pd

XOP

Header file <intrin.h>

Each of the two quadwords in the high 128 bits of selector selects the value for its corresponding quadword of the result from one of the four 64-bit floating-point values in the high 128 bits of src1 and src2. This value may be replaced by zero before being written to the result, depending on the value of control and the value of bit 3 of the selector quadword. Similarly, each of the two quadwords in the low 128 bits of selector selects a value from one of the four 64-bit floating-point values in the low 128 bits of src1 and src2, and this value may also be replaced by zero.

For each quadword in the high 128 bits of selector, the second and third low-order bits select one of the floating-point values in src1 or src2, with values 0 through 1 selecting src1[2] through src1[3] and values 2 through 3 selecting src2[2] through src2[3]. For each quadword in the low 128 bits of selector, the second and third low-order bits select one of the floating-point values in src1 or src2, with values 0 through 1 selecting src1[0] through src1[1] and values 2 through 3 selecting src2[0] through src2[1].

The next bit of each quadword in selector will be referred to as the "match" bit below. The low-order bit and the high-order 60 bits of each quadword in selector are ignored.

The fourth source, control, determines the conditions under which result values will be set to 0. The value of control must be 0, 1, 2, or 3. If control is 0 or 1, the selected floating-point value is written to the destination. If control is 2, then the selected floating-point value is written to the destination if the corresponding match bit in selector is 0, but zero is written if the match bit is 1. If control is 3, then the selected floating-point value is written to the destination if the corresponding match bit is 1, but zero is written if the match bit is 0.

The vpermil2pd instruction is part of the XOP family of instructions. Before you use this intrinsic, you must ensure that the processor supports this instruction. To determine hardware support for this instruction, call the __cpuid intrinsic with InfoType = 0x80000001 and check bit 11 of CPUInfo[2] (ECX). This bit is 1 when the instruction is supported, and 0 otherwise.

#include <stdio.h>
#include <intrin.h>
int main()
{
    __m256d a, b, d;
    __m256i select;
    int i;
    for (i = 0; i < 4; i++) {
        a.m256d_f64[i] = i;
        b.m256d_f64[i] = i + 4;
    }
    select.m256i_i64[0] = 2 << 1;
    select.m256i_i64[1] = (1 << 1) + 8; // turn on match bit
    select.m256i_i64[2] = 0 << 1;
    select.m256i_i64[3] = (3 << 1) + 8; // turn on match bit

    
    d = _mm256_permute2_pd(a, b, select, 0); // just select, don't zero
    printf_s("%.3lf %.3lf %.3lf %.3lf\n", d.m256d_f64[0],
             d.m256d_f64[1], d.m256d_f64[2], d.m256d_f64[3]);
    d = _mm256_permute2_pd(a, b, select, 2); // zero if match is 1
    printf_s("%.3lf %.3lf %.3lf %.3lf\n", d.m256d_f64[0],
             d.m256d_f64[1], d.m256d_f64[2], d.m256d_f64[3]);
    d = _mm256_permute2_pd(a, b, select, 3); // zero if match is 0
    printf_s("%.3lf %.3lf %.3lf %.3lf\n", d.m256d_f64[0],
             d.m256d_f64[1], d.m256d_f64[2], d.m256d_f64[3]);
}
4.000 1.000 2.000 7.000
4.000 0.000 2.000 0.000
0.000 1.000 0.000 7.000

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