Texas Instruments SDP2420 Development Board Supported Features (Windows Embedded CE 6.0)

1/5/2010

The following table shows hardware components that are supported in the board support package (BSP) for the Texas Instruments SDP2420 Development Board.

Hardware component Texas Instruments SDP2420 Development Board hardware support Texas Instruments SDP2420 Development Board BSP support

RAM

Yes

Yes

Flash memory

Yes

FATFS for flash memory: Yes

BinFS for flash memory: Yes

XIP from flash memory: No

Boot ROM

Yes

Yes

Timers

Yes

Yes

Real-time clock

Yes

Yes

VGA video adapter

No

No

LCD display

Yes

Yes

Ethernet port

Yes

Yes

Serial port

2

Yes

PC card or compact flash card

Yes

Yes

Secure Digital

Yes

Yes

Mouse

Universal serial bus (USB)

Yes

Keyboard

USB and PS/2

Yes

Hardware reset through a cold boot

Yes

Yes

Hardware reset through a warm boot

Yes

Yes

Software reset through a warm boot

Yes

Yes

Touch controller

Yes

Yes

USB host

Yes

Yes

USB function

Yes

Yes

Serial Infrared (SIR)

Yes

No

Fast Infrared (FIR)

Yes

No

Audio output

Onboard

Yes

Audio input

Onboard

Yes

Parallel port for printing

No

Not applicable

Integrated Device Electronics (IDE)

No

Not applicable

Smart card

No

Not applicable

Floppy disk drive

No

Not applicable

TV output

No

Not applicable

Floating point unit

Yes

No

Expansion connector

Custom

No

PCI slots

No

Not applicable

Compact PCI or PCI extender

No

Not applicable

Logic analyzer probes

Yes

Yes

IEEE 1149.1-compliant (JTAG)

Yes

Yes

Debug LEDs

Yes

Yes

Companion or add-on cards

Yes

Yes

Form factor

Custom

Yes

ARMV6 and V7 Support

The BSP for the Texas Instruments SDP2420 Development Board now includes support for ARMV6 and V7 features. For more information, see ARMV6 and V7 Supported Features.

Texas Instruments SDP2420 Development Board Performance Considerations

Keep in mind the following performance considerations for the Texas Instruments SDP2420 Development Board:

  • Texas Instruments SDP2420 Development Board fails when using PC card NICs to transfer packet sizes that are approximately 55 KB or greater.
    This failure is due to the I/O cycle access latency. The I/O access cycle timing can be shortened and still be within PCCARD specification. However, the timing was made lax to accommodate PC cards that do not conform to the specification.
  • The debug serial port on the Texas Instruments SDP2420 Development Board is now selectable.

See Also

Tasks

How to Use the BSP for the Texas Instruments SDP2420 Development Board
Setting Up the Texas Instruments SDP2420 Development Board Hardware