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_mm_mulhrs_pi16

Microsoft Specific

Emits the Supplemental Streaming SIMD Extensions 3 (SSSE3) instruction pmulhrsw. This instruction multiplies two sets of 16-bit integers.

__m64 _mm_mulhrs_pi16( 
   __m64 a,
   __m64 b
);

[in] a

A 64-bit parameter that contains four 16-bit signed integers.

[in] b

A 64-bit parameter that contains four 16-bit signed integers.

A 64-bit value that contains four 16-bit signed integers. The result can be expressed by the following equations.

r0 := INT16(((a0 * b0) + 0x4000) >> 15)
r1 := INT16(((a1 * b1) + 0x4000) >> 15)
r2 := INT16(((a2 * b2) + 0x4000) >> 15)
r3 := INT16(((a3 * b3) + 0x4000) >> 15)

Intrinsic

Architecture

_mm_mulhrs_pi16

x86, x64

Header file <tmmintrin.h>

r0-r3, a0-a3, and b0-b3 are the sequentially ordered 16-bit components of return value r and parameters a and b. r0, a0, and b0 indicates the least significant 16 bits.

Before you use this intrinsic, software must ensure that the processor supports the instruction.

#include <stdio.h>
#include <tmmintrin.h>

int main ()
{
     __m64 a, b, final;

    a.m64_i16[0] = -0x5CEE;
    a.m64_i16[1] = 0x0105;
    a.m64_i16[2] = 0x3DA9;
    a.m64_i16[3] = -0x7FFF;

    b.m64_i16[0] = 0x4000;
    b.m64_i16[1] = -0x510A;
    b.m64_i16[2] = 0x209D;
    b.m64_i16[3] = -0x7FFF;

    for (int index = 0; index < 4; index++)
    {
        final.m64_i16[index] = ((a.m64_i16[index] * b.m64_i16[index]) + 0x4000) >> 15;
    }

    __m64 res = _mm_mulhrs_pi16(a, b);

    printf_s("Res0 should be %d: %d\nRes1 should be %d: %d\n",
                final.m64_i16[0], res.m64_i16[0],
                final.m64_i16[1], res.m64_i16[1]);
    printf_s("Res2 should be %d: %d\nRes3 should be %d: %d\n",
                final.m64_i16[2], res.m64_i16[2],
                final.m64_i16[3], res.m64_i16[3]);

    _mm_empty();

    return 0;
}
Res0 should be -11895: -11895 Res1 should be -165: -165 Res2 should be 4022: 4022 Res3 should be 32766: 32766

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