atomic_and (sm5 - asm)
Atomic bitwise AND to memory.
|atomic_and dst, dstAddress[.swizzle], src0[.select_component]|
[in] The components to AND with src0. This value must be an unordered access view (UAV) (u#). In the compute shader it can also be thread group shared memory (g#).
[in] The memory address.
[in] The components to AND with dst.
This operation performs a single component 32-bit bitwise AND of operand src0 into dst at 32-bit per component address dstAddress, performed atomically.
The number of components taken from the address is determined by the dimensionality of dst u# or g#.
If dst is a u#, it can be declared as raw, typed or structured. If typed, it must be declared as UINT/SINT with the bound resource format being R32_UINT/_SINT.
If dst is g#, it must be declared as raw or structured.
Nothing is returned to the shader.
If the shader invocation is inactive, for example if the pixel has been discarded earlier in its execution, or a pixel/sample invocation only exists to serve as a helper to a real pixel/sample for derivatives, this instruction does not alter the dst memory at all (silently).
Out of bounds addressing on u# causes nothing to be written to memory, except if the u# is structured, and byte offset into the struct (second component of the address) is causing the out of bounds access, then the entire contents of the UAV become undefined.
Out of bounds addressing on g# (the bounds of that particular g#, as opposed to all shared memory) causes the entire contents of all shared memory to become undefined.
This instruction applies to the following shader stages:
Because UAVs are available at all shader stages for Direct3D 11.1, this instruction applies to all shader stages for the Direct3D 11.1 runtime, which is available starting with Windows 8.
This instruction is supported in the following shader models:
|Shader Model 5||yes|
|Shader Model 4.1||no|
|Shader Model 4||no|
|Shader Model 3 (DirectX HLSL)||no|
|Shader Model 2 (DirectX HLSL)||no|
|Shader Model 1 (DirectX HLSL)||no|