Designing Power-Friendly DevicesUpdated: May 8, 2007 File name: WinHEC2007_ PowerFriendlyDevices.doc
About This DownloadThis paper focuses on the behavior of devices that causes a significant increase to system power. Unfortunately, today's systems are not optimized for situations where devices either generate power-unfriendly traffic patterns or do not support baseline mobile platform features such as link power management or intelligent traffic management. The first section of this paper covers key concepts of modern-day multicore platform power management works, with real-world data to illustrate the power impact of ill-behaved devices on platforms. The second section focuses on PCI Express Base Specification 2.0 (PCIe) and some of the key challenges observed, with recommendations including link state support, local power management policy, and production of activity patterns that help facilitate good platform energy efficiency. The third section focuses on USB 2.0, with recommendations including dynamic asynchronous scheduler management, conveying interrupt information through periodic endpoints, and the proper use of selective suspend. This information applies for the following operating systems: Included in this white paper:
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