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SYSTEM_LOGICAL_PROCESSOR_INFORMATION Structure

Describes the relationship between the specified processor set. This structure is used with the GetLogicalProcessorInformation function.

Syntax

C++
typedef struct _SYSTEM_LOGICAL_PROCESSOR_INFORMATION {
  ULONG_PTR                      ProcessorMask;
  LOGICAL_PROCESSOR_RELATIONSHIP Relationship;
  union {
    struct {
      BYTE Flags;
    } ProcessorCore;
    struct {
      DWORD NodeNumber;
    } NumaNode;
    CACHE_DESCRIPTOR Cache;
    ULONGLONG Reserved[2];
  } ;
}SYSTEM_LOGICAL_PROCESSOR_INFORMATION, *PSYSTEM_LOGICAL_PROCESSOR_INFORMATION;

Members

ProcessorMask

The processor mask identifying the processors described by this structure. A processor mask is a bit vector in which each set bit represents an active processor in the relationship. At least one bit will be set.

On a system with more than 64 processors, the processor mask identifies processors in a single processor group.

Relationship

The relationship between the processors identified by the value of the ProcessorMask member. This member can be one of the following LOGICAL_PROCESSOR_RELATIONSHIP values.

ValueMeaning
RelationCache
2

The specified logical processors share a cache. The Cache member contains additional information.

Windows Server 2003:  This value is not supported until Windows Server 2003 with SP1 and Windows XP Professional x64 Edition.
RelationNumaNode
1

The specified logical processors are part of the same NUMA node. The NumaNode member contains additional information.

RelationProcessorCore
0

The specified logical processors share a single processor core. The ProcessorCore member contains additional information.

RelationProcessorPackage
3

The specified logical processors share a physical package. There is no additional information available.

Windows Server 2003 and Windows XP Professional x64 Edition:  This value is not supported until Windows Server 2003 with SP1 and Windows XP with SP3.

 

Future versions of Windows may support additional values for the Relationship member.

ProcessorCore

This structure contains valid data only if the Relationship member is RelationProcessorCore.

Flags

If the value of this member is 1, the logical processors identified by the value of the ProcessorMask member share functional units, as in Hyperthreading or SMT. Otherwise, the identified logical processors do not share functional units.

Windows Server 2003 and Windows XP Professional x64 Edition:  This member is also 1 for cores that share a physical package. Therefore, to determine whether the processor supports multiple cores or hyperthreading on systems prior to Windows Vista, use the CPUID instruction.
NumaNode

This structure contains valid data only if the Relationship member is RelationNumaNode.

NodeNumber

Identifies the NUMA node. The valid values of this parameter are 0 to the highest NUMA node number inclusive. A non-NUMA multiprocessor system will report that all processors belong to one NUMA node.

Cache

A CACHE_DESCRIPTOR structure that identifies the characteristics of a particular cache. There is one record returned for each cache reported. Some or all caches may not be reported, depending on the mechanism used by the processor to identify its caches. Therefore, do not assume the absence of any particular caches. Caches are not necessarily shared among logical processors.

This structure contains valid data only if the Relationship member is RelationCache.

Windows Server 2003:  This member is not supported until Windows Server 2003 with SP1 and Windows XP Professional x64 Edition.
Reserved

Reserved. Do not use.

Examples

For an example, see GetLogicalProcessorInformation.

Requirements

Minimum supported clientWindows Vista, Windows XP Professional x64 Edition
Minimum supported serverWindows Server 2003
HeaderWinnt.h (include Windows.h)

See Also

CACHE_DESCRIPTOR
GetLogicalProcessorInformation
GetLogicalProcessorInformationEx
LOGICAL_PROCESSOR_RELATIONSHIP
SYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX

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Build date: 10/8/2009

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Hyper-threading ON detection code in C/C++      opedroso ... jkriegshauser   |   Edit   |   Show History

Note from jkriegshauser: This code sample does not work as expected on Multi-core processors (i.e. Core2 Duo/Quad, etc). The reason is because the newer multi-core processors define the HTT flag as "hardware multithreading" and the logical processor count will include the cores even though Core2 Duo processors do not have HTT. See the following Intel publications:

Intel Processor Identification and the CPUID Instruction: http://www.intel.com/assets/pdf/appnote/241618.pdf

Intel 64 and IA-32 Architectures Software Developer's Manual Vol 3A (section 7.10.2): http://www.intel.com/design/processor/manuals/253668.pdf


The following code returns non-zero when Hyper-Threading is enabled.

__inline BOOL hyperThreadingOn()
{
DWORD rEbx, rEdx;
__asm {
push eax // save registers used
push ebx
push ecx
push edx
xor eax,eax // cpuid(1)
add al, 0x01
_emit 0x0F
_emit 0xA2
mov rEdx, edx // Features Flags, bit 28 indicates if HTT (Hyper-Thread Technology) is
// available, but not if it is on; if on, Count of logical processors > 1.
mov rEbx, ebx // Bits 23-16: Count of logical processors.
// Valid only if Hyper-Threading Technology flag is set.
pop edx // restore registers used
pop ecx
pop ebx
pop eax
}
return (rEdx & (1<<28)) && (((rEbx & 0x00FF0000) >> 16) > 1);
}
Processing
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