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Registers - gs_5_0

The following input and output registers are implemented in the geometry shader version 5_0.

Input Registers

Register TypeCountR/WDimensionIndexable by r#DefaultsRequires DCL
32-bit Temp (r#) 4096(r#+x#[n])R/W4NoNoneYes
32-bit Indexable Temp Array (x#[n]) 4096(r#+x#[n])R/W4YesNoneYes
32-bit Input (v[vertex][element]) 32R4(comp)*32(vert)YesNoneYes
32-bit Input Primitive ID (vPrim) 1R1NoNoneYes
32-bit Input Instance ID (vInstanceID)1R1NoNoneYes
Element in an input resource (t#) 128R1NoNoneYes
Sampler (s#) 16R1NoNoneYes
ConstantBuffer reference (cb#[index]) 15R4Yes(contents)NoneYes
Immediate ConstantBuffer reference (icb[index]) 1R4Yes(contents)NoneYes

 

Output Registers

Register TypeCountR/WDimensionIndexable by r#DefaultsRequires DCL
NULL (discard result, useful for ops with multiple results) N/AWN/AN/AN/ANo
32-bit output Vertex Data Element (o#) 32WN/AN/A4Yes

 

 

 

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