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Registers - vs_4_1

This section contains reference information for the input and output registers implemented by vertex shader version 4_1.

Input Registers

RegisterNameCountR/WDimensionIndexable by r#DefaultsRequires DCL
r#4096(r#+x#[n])R/W4NoNoneYes
x#[n]4096(r#+x#[n])R/W4YesNoneYes
v#32R4YesNoneYes
t#128R1NoNoneYes
s#16R1NoNoneYes
cb#[index]15R4Yes(Contents)NoneYes
icb[index]1R4Yes(Contents)NoneYes

 

Output Registers

RegisterNameCountR/WDimensionIndexable by r#DefaultsRequires DCL
NULLDiscard ResultN/AWN/AN/AN/ANo
o#Output Register32WN/AN/A4Yes

 

 

 

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