MIPSII and MIPSIV Kernel
Other versions of this page are also available for the following:
.gif "A hyphen indicates that the information in this topic is not relevant for this platform, or that the platform does not support the API that is listed.")
.gif "A checkmark indicates that the information in this topic is relevant for this platform, and that any API listed is also supported on this platform.")
8/27/2008
Before control is transferred to the kernel, the boot loader calls the StartUp routine to put the CPU into an initialized state. OEMs may also have to perform additional SDB/CPU specific initializations as mentioned in the user manual.
The following table shows the MIPS-based BSP and source file locations included in Platform Builder for which the StartUp function is specified.
| BSP | Source file |
|---|---|
NEC Solution Gear 2-Vr5500 |
%_WINCEROOT%\Platform\SG2_VR5500\Src\OAL |
OEMs developing for the MIPS processor using the MIPS kernel should perform the following tasks:
- Set the CPU to run in uncached mode
- Clear watch registers
- Set up configuration registers
- Set BCU registers
- Initialize and invalidate the CPU cache
- Clear the HAL timer
- Initialize memory controllers, if necessary
After the final step, StartUp must call KernelStart to allow the kernel to initialize. The function address for KernelStart should preferably be an uncached and unmapped addressed in kernel segment 1 (kseg1).
Kseg1 is an address range defined in the MIPS architecture and has the following specific access characteristics: the CPU should be in kernel mode, there are no TLB mappings, and the address range is noncacheable.