Emit the IPF Purge Translation Register (ptr) instruction.
- [in] Address
Loaded into the first general register supplied to the instruction. Bits 0 to 60 specify the virtual address to purge. Bits 61 to 63 specify the region identifier.
- [in] Range
Loaded into the second general register supplied to the instruction. Bits 2 to 7 represent the page size; other bits are ignored.
The instruction has two forms: ptr.d (data) and ptr.i (instruction). The intrinsics emit the similarly named form of the instruction. Unlike __ptcg and __ptcga, the operation is local to the processor.
For more information, see the Intel IPF documentation. These routines are only available as intrinsics.